This invention relates to MOS integrated circuits of the type having substrate bias and more particularly to a circuit for generating a substrate bias voltage in a P-channel MOS/LSI device.
In P-channel MOS integrated circuits, some circuit functions such as dynamic shift registers produce an undesirable phenomena referred to as charge pumping. A P-N junction in the shift register may become forward biased and inject holes into the substrate, which will spread for a distance related to the lifetime of holes in n-type silicon. Other devices within this distance may be rendered inoperative by this charge spreading. Memory cell such as shift register stages, or self-refresh RAM cells are particularly vulnerable. Forward bias of the P-N junction may be avoided by adding a substrate bias, i.e., biasing the substrate positive with respect to the "Vss" terminal to which many of the sources of MOS transistors in the MOS/LSI device are connected. It is preferable to avoid adding terminals to the MOS/LSI package because there are industry-standard dual-in-line packages which have 18 pins, 22 pins or 28 pins, etc. and great economies are achieved by using a standard package with the smallest number of pins. Further, if the MOS device is to be used as a calculator chip or in other small self-contained housings, additional power supplies are to be avoided. A calculator should operate on a single 9 v. battery for lowest cost. For these reasons, a substrate bias supply internal to the chip is the objective. N-channel memory devices have been reported which have internally-generated substrate bias features; the circuits previously proposed for N-channel memory chips are not suitable for P-channel calculator chips, however. The purpose of the N-channel substrate bias is to increase the threshold voltage of parasitic MOS transistors, i.e., to avoid unwanted MOS transistors being created under field oxide. Substrate bias has very pronounced effect on threshold voltage, whether in N-channel or P-channel. The substrate bias can change as the Vdd supply battery discharges or due to temperature variations and alter the threshold voltages throughout the MOS/LSI device.
It is therefore the principal object of the invention to provide an improved circuit for generating substrate bias for a semiconductor integrated circuit device. Another object is to provide a substrate bias supply circuit internal to a P-channel MOS/LSI device.